This invention relates in general to flag setting and reading circuits and in particular, to a self arbitrating and automatically resettable flag setting and reading circuit.
A flag or status bit signal is initiated by one part of a computer system so that another part of the computer system can be made aware of the existence or nonexistence of a condition and accordingly, take appropriate action. For example, when a microprocessor unit tries to write to an already full buffer, a buffer controller initiates a flag setting signal which is transmitted to a flag setting and reading circuit to indicate an overrun condition. The flag setting and reading circuit then sets a flag in its circuitry. To check the status of the buffer, the microprocessor initiates a flag reading signal which is transmitted to the flag setting and reading circuit. The flag setting and reading circuit then latches the previously set flag into a location accessible to the microprocessor. The microprocessor then reads the flag from the location, is made aware of the overrun condition, and stops attempting to write to the buffer until the buffer clears.